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authorMaxime Chevalier-Boisvert <[email protected]>2025-02-14 14:16:15 -0500
committerTakashi Kokubun <[email protected]>2025-04-18 21:52:58 +0900
commitce9c9e0a6a9651a23d1274b73ad9a7e26bf9396d ()
tree3961b82982dd034ce9de12b1275f2ba48f8403d8 /zjit/src/lib.rs
parent22eec6592805be64603aa624b014f8d87746d462 (diff)
Rename ir.rs to hir.rs to avoid namespace ambiguity with backend
Notes: Merged: https://.com/ruby/ruby/pull/13131
-rw-r--r--zjit/src/lib.rs6
1 files changed, 3 insertions, 3 deletions
@@ -3,7 +3,7 @@
mod state;
mod cruby;
-mod ir;
mod codegen;
mod stats;
mod cast;
@@ -83,7 +83,7 @@ pub extern "C" fn rb_zjit_iseq_gen_entry_point(iseq: IseqPtr, _ec: EcPtr) -> *co
// TODO: acquire the VM barrier
// Compile ISEQ into SSA IR
- let ssa = match ir::iseq_to_ssa(iseq) {
Ok(ssa) => ssa,
Err(err) => {
debug!("ZJIT: to_ssa: {:?}", err);
@@ -91,7 +91,7 @@ pub extern "C" fn rb_zjit_iseq_gen_entry_point(iseq: IseqPtr, _ec: EcPtr) -> *co
}
};
- // Compile SSA IR into machine code (TODO)
let cb = ZJITState::get_code_block();
match gen_function(cb, &ssa) {
Some(start_ptr) => start_ptr.raw_ptr(cb),