verilog-hdl

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the project includes system design of a t intersection traffic light controller and its verilog code in vivado design suite.

Verilog HDL implementations of adders/subtractor, multiplier, divider and square root. As well as HTML simulations.

A large MOS 6502 processor replica, made for understanding and de-mystifying the inner workings of computers.

A playground based on the classic version of the Cloud V IDE

Projects made while at BU

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